The invention relates to a modulator for IMT-2000 synchronous mobile station in a digital telecommunication and modulating method thereof, and more particularly, the OCQPSK modulator using FIR filters, each for performing 1:4 interpolation operations for 4 input data and modulating method thereof.
In a modulator for use in a digital telecommunication, modulating schemes such as Orthogonal Complex Quadrature Phase Shift Keying (OCQPSK) etc., have been widely used. At this time, in order to suppress inter-symbol interference, a pulse-shaping interpolation filtering is required. In case of a synchronous mobile station for the third generation telecommunication system IMT-2000, as the 1-bit output of 4 channels are multiplied by the gain, two each channels each are added and then modulated by OCQPSK modulating scheme in a single chip, additional two FIR filters having n-bit inputs are required.
FIG. 1 is a diagram for illustrating a construction of a conventional OCQPSK modulating apparatus which consists of an OCQPSK modulating block and a FIR filter block in an IMT-2000 synchronous mobile station. The 1-bit inputs of the four channels, as follows, CH1, CH2, CH3 and CH4 are inputted to a Walsh covering block 100, in which the three channels CH2, CH3 and CH4 in the Walsh covering block 100 are Walsh-Covered by Walsh quadrature codes Walsh2, Walsh3 and Walsh4 for discriminating their channels. Then, they are inputted to a gain stage block 110 wherein multipliers 111, 112, 113 and 114 multiplies the input signals of respective channels to the gains G1, G2, G3 and G4 of respective channels to output n-bits, for adjusting the gain of respective channels. At this time, the n-bit outputs are added in adders 121 and 122 in a channel adder block 120 by every two channels, thus producing two quadrature signals DI and DQ.
Two quadrature signals DI and DQ are modulated in a OCQPSK modulating block 130. The modulating block 130 is composed of a PN spreader 131 for receiving PN sequences generated from long and short PN generator 140, a complex adder 132 for complex-multiplying the PN spreaded results based on OCQPSK modulating scheme. The outputs of the OCQPSK modulating block 130 are output in n-bit shape, in which the n-bit outputs are then inputted to two n-bit input FIR filters 141 and 142 in the FIR filter block 140 which then performs a FIR filtering and a pulse shaping for the entered outputs.
The output signals from the two FIR filters 141 and 142 are inputted to D/A converters 150 and 151 of an analog chip, this signals are converted the input signals into analog signal, modulated (152, 153) and multiplied by gains (154) for output.
At this time, if the gains are multiplied at the gain stage block 110, as respective channel data become a n-bit shape, the operations of the channel adder block 120, the OCQPSK modulating block 130 consisted of the PN spreader 131 and the complex adder 132, and the FIR filter block 140 are performed to produce a n-bit shape. Therefore, in implementing them, there is a problem that requires large size of hardware. Particularly, as the two n-bit input FIR filters must be implemented using multipliers, the amount of hardware use becomes further great.
These n-bit input FIR filter includes a Transversal FIR filter.
FIG. 2 shows a construction of a conventional 48 tap 1:4 interpolation Transversal FIR filter. This conventional filter is basic one and the operational scheme of which is hardware-implemented by the conventional FIR filter type.
For example, using this Transversal FIR filter design scheme, in order to design a pulse shaping FIR filter for performing 48 tap 1:4 interpolation having the input signals and the output signals of 8 bits and coefficient of 10 bits, twelve 10xc3x978 multipliers, twelve 18-bit adders, forty four 18-bit registers and one 8-bit register are required.
As this Transversal FIR filter has a single structure, there is the problem that only one filter operation must be performed at a single filter without increasing its operational speed and then this requires large size of hardware as above-mentioned.
That is, the circuit size of the Transversal FIR filter is large compared to that of the FIR filter having 1-bit input. Thus, if the modulator is designed by using this conventional filter design scheme, the design area becomes greater and the frequency of the operating clock is unnecessarily increased.
The present invention is contrived to solve the conventional problems and the object of the present invention to provide a OCQPSK modulating apparatus capable of significantly reducing the hardware size, by using a 1-bit input FIR filter for input channels located in front of a gain stage block instead of using a n-bit input FIR filter the size of which is large.
In order to accomplish the above object, a quadrature phase shift keying (QPSK) modulating apparatus using a 1-bit input FIR filter according to the present invention is characterized in that it comprises pseudo noise spreading means for bifurcating 1-bit data inputted from input channels and pseudo-spreading said bifurcated 1-bit data, FIR filtering means for receiving said 1-bit data and performing a filtering operation for pulse shaping, a gain multiplying block for multiplying filtered data outputted from said FIR filtering means by gain for respective channels, and a channel adder block for adding data outputted from said gain multiplying block to output I channel and Q channel signals.
Preferably, the number of said input channels is 4xc3x97i, where i is a positive integer.
More preferably, the FIR filtering means includes 2xc3x97i FIR filters, where i is a positive integer, each for performing 1:4 interpolation operation for 4input data from said pseudo noise spreading means.
Also, according to the present invention, a quadrature phase shift keying (QPSK) modulating method using a 1-bit input FIR filter is provided. The method includes the following steps. A first step is of bifurcating 1-bit data inputted from input channels. A second step is of pseudo-spreading said bifurcated 1-bit data. A third step is of FIR filtering said 1-bit data for pulse shaping. A fourth step is of multiplying filtered data by gain for respective channels. And, a fifth step is of channel-adding said data multiplied by gain to output I channel and Q channel signals.